ADT7476EBZEVB【PDF 10/65 页】BOARD EVALUATION FOR ADT7476

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ADT7476

pulse to assert a stop condition. In read mode, the

master device overrides the acknowledge bit by

pulling the data line high during the low period

before the ninth clock pulse. This is known as no

acknowledge. The master then takes the data line

low during the low period before the 10 th clock

pulse, and then high during the 10 th clock pulse to

assert a stop condition.

Any number of bytes of data can be transferred over the

serial bus in one operation. However, it is not possible to mix

read and write in one operation because the type of operation

is determined at the beginning and cannot subsequently be

changed without starting a new operation. In the ADT7476,

write operations contain either one or two bytes, and read

operations contain one byte.

To write data to one of the device data registers or read

data from it, the address pointer register must be set so the

correct data register is addressed. Then, data can be written

into that register or read from it. The first byte of a write

operation always contains an address stored in the address

pointer register. If data is to be written to the device, then the

write operation contains a second data byte that is written to

the register selected by the address pointer register.

This write operation is illustrated in Figure 18. The device

address is sent over the bus, and then R/W is set to 0. This

is followed by two data bytes. The first data byte is the

address of the internal data register to be written to, which

is stored in the address pointer register. The second data byte

is the data to be written to the internal data register.

When reading data from a register, there are two possibilities:

1. If the ADT7476’s address pointer register value is

unknown, or not the desired value, then it must

first be set to the correct value before data can be

read from the desired data register. This is done by

performing a write to the ADT7476 as before, but

only the data byte containing the register address

is sent, because no data is written to the register

(see Figure 19).

A read operation is then performed consisting of

the serial bus address; R/W bit set to 1, followed

by the data byte read from the data register (see

Figure 20.)

2. If the address pointer register is already known to

be at the desired address, data can be read from the

corresponding data register without first writing to

the address pointer register (see Figure 20).

It is possible to read a data byte from a data register

without first writing to the address pointer register, if the

address pointer register is already at the correct value.

However, it is not possible to write data to a register without

writing to the address pointer register, because the first data

byte of a write is always written to the address pointer

register.

In addition to supporting the send byte and receive byte

protocols, the ADT7476 also supports the read byte protocol.

See Intel’s System Management Bus Specifications

Revision 2 for more information.

If several read or write operations must be performed in

succession, the master can send a repeat start condition

instead of a stop condition to begin a new operation.

1

9

1

9

SCL

SDA

0

1

0

1

1

A1

A0

R/W

D7

D6

D5

D4

D3

D2

D1

D0

FRAME 2

START BY

MASTER

FRAME 1

SERIAL BUS ADDRESS BYTE

ACK. BY

ADT7476

1

ACK. BY

ADT7476

ADDRESS POINTER REGISTER BYTE

9

SCL (CONTINUED)

SDA (CONTINUED)

D7

D6

D5

D4

D3

D2

D1

D0

FRAME 3

DATA BYTE

ACK. BY STOP BY

ADT7476 MASTER

Figure 18. Writing a Register Address to the Address Pointer Register, then Writing Data to the Selected Register

1

9

1

9

SCL

SDA

0

1

0

1

1

A1

A0 R/W

D7

D6

D5

D4

D3

D2

D1

D0

FRAME 2

START BY

MASTER

FRAME 1

SERIAL BUS ADDRESS BYTE

ACK. BY

ADT7476

ACK. BY

MASTER

ADDRESS POINTER REGISTER BYTE

STOP BY

MASTER

Figure 19. Writing to the Address Pointer Register Only

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